Metal working – Method of mechanical manufacture – Assembling or joining
Patent
1980-05-14
1982-05-25
Rutledge, L. Dewayne
Metal working
Method of mechanical manufacture
Assembling or joining
29578, 29580, 29591, 148175, 156612, 357 4, 357 20, 357 56, H01L 21203, H01L 21283
Patent
active
043309321
ABSTRACT:
A controlled environment process for making diode arrays by depositing the sublimate of a semiconductor material through an aperture of a mask placed nearby a substrate and then subjecting part of the sublimate to ion implantation. The aperture causes diffraction of the sublimate vapor stream while the proximity of the edges of the aperture to the substrate causes the central plateau of the deposited thin-film to have a rounded rim leading to sides that taper smoothly in thickness to the substrate. Ion implantation to a controlled depth creates an isolated planar junction. Surface layers of a gold electrode running onto the substrate from different surface areas of the thin-film provide for off-mesa bonding of electrical leads.
REFERENCES:
patent: 3303067 (1967-02-01), Haering et al.
patent: 3341360 (1967-09-01), Nickl
patent: 3394289 (1968-07-01), Lindmayer
patent: 3419424 (1968-12-01), Steggewentz et al.
patent: 3484662 (1969-12-01), Hagon
patent: 3743552 (1973-07-01), Fa
patent: 3793070 (1974-02-01), Schoolar
patent: 3796597 (1974-03-01), Porter et al.
patent: 3890632 (1975-06-01), Ham et al.
patent: 3920482 (1975-11-01), Russell
patent: 3961998 (1976-06-01), Scharnhorst et al.
patent: 4047975 (1977-09-01), Widmann
patent: 4127860 (1978-11-01), Beelitz et al.
patent: 4154631 (1979-05-01), Schoolar
patent: 4199860 (1980-04-01), Beelitz et al.
Zuleeg, R., "Silicon on Sapphire . . . Microwave IC's" Electronics, Mar. 1967, pp. 106-108.
Ludeke et al., "Fabrication for . . . Injection Laser", IBM Tech. Discl. Bull., vol. 15, No. 2, Jul. 1972, pp. 546-547.
Zuleeg et al., "Thin-Film Lateral Bipolar . . . Structure", Electronic Letters, Apr. 1967, vol. 3, No. 4, pp. 137-139.
Bis Richard F.
Morris Hayden
Branning A. L.
Henderson W. R.
Rutledge L. Dewayne
Saba W. G.
Sciascia R. S.
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