Process for polysilicon thin film transistors using backside irr

Details Process for polysilicon thin film transistors using backside irr Process for polysilicon thin film transistors using backside irr

1996-06-13

1997-02-11

Niebling, John

Fishing, trapping, and vermin destroying

437101, 437174, 437907, H01L 2184, H01L 21306, H01L 21326, H01L 21479

Patent

active

056020473

ABSTRACT:
The source-to-drain gap in a TFT is formed by exposing a positive photoresist from the back side of the substrate, using the gate as an optical mask. The resulting photoresist mask then protects the underlying amorphous silicon while the structure is exposed to a gaseous plasma that includes dopant material. Heavily doped regions are thus formed, leaving a gap that is in perfect alignment with the gate. After removal of the photoresist, the structure is given a laser anneal which results both in the crystallization of the amorphous silicon into polysilicon as well as a more even distribution of the dopant material. The structure is completed in the usual way by providing a passivation layer.

REFERENCES:
patent: 5173753 (1992-12-01), Wu
patent: 5391507 (1995-02-01), Kwasnick et al.
patent: 5424230 (1995-06-01), Wakai
patent: 5441905 (1995-08-01), Wu
patent: 5488000 (1996-01-01), Zhang et al.
patent: 5523257 (1996-06-01), Yamazaki et al.
patent: 5529951 (1996-06-01), Noguchi et al.
patent: 5530265 (1996-06-01), Takemura

Affiliated with

Also associated with

Rating

Process for polysilicon thin film transistors using backside irr does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for polysilicon thin film transistors using backside irr, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for polysilicon thin film transistors using backside irr will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-341535