Process for passivating semiconductor members

Details Process for passivating semiconductor members Process for passivating semiconductor members

1980-08-18

1982-03-30

Smith, John D.

Coating processes

Electrical product produced

Condenser or capacitor

427 86, 427 99, 357 52, H01L 21314

Patent

active

043224520

ABSTRACT:
Passivating a semiconductor device by vapor depositing a layer of silicon and thereafter tempering the deposited layer of silicon. As a result of the tempering, a drastic reduction in the blocking current in the blocking direction and the blocking current in the trigger direction of the semiconductor device are achieved.

REFERENCES:
patent: 2789258 (1957-04-01), Smith
patent: 3765940 (1973-10-01), Hentzschel
patent: 3806361 (1974-04-01), Lehner
patent: 4084986 (1978-04-01), Aoki et al.
patent: 4086613 (1978-04-01), Biet et al.
patent: 4134125 (1979-01-01), Adams et al.
patent: 4179528 (1979-12-01), Losee et al.
Matsushita et al., "Semi-insulating polycrystalline-silicon (Sipos) Passivation Technology" Japanese Journal of Applied Physics, 15, Suppl. 15-1, pp. 35-40 (1976).

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