Active solid-state devices (e.g. – transistors – solid-state diode – Incoherent light emitter structure – Encapsulated
Reexamination Certificate
2000-08-25
2003-07-22
Abraham, Fetsum (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Incoherent light emitter structure
Encapsulated
C257S099000, C257S678000, C257S684000, C257S698000, C257S707000
Reexamination Certificate
active
06597020
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims priority from prior French Patent Application No. 99-10841, filed Aug. 27, 1999, the entire disclosure of which is herein incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to integrated circuits, and more specifically to a process for packaging an integrated circuit chip having sensors and a semiconductor device or package containing such a chip.
2. Description of Related Art
In order to package an integrated circuit chip that has sensors on its front face, the rear face of the chip is cemented to a rigid ceramic substrate and the terminals of the chip are electrically connected by connection wires to connection areas on the front face of the substrate. The substrate has electrical connection tracks which go around its edges so as to electrically connect its front connection areas to the rear connection areas. Then, in some packages, a lid extending in front of the front face of the chip is cemented. In other packages, the chip and the connection wires are then embedded in a transparent encapsulating resin.
Due to the materials and the electrical connection methods that are used, such packages necessarily have a square or rectangular outline that follows the outline of the chip. Furthermore, the fabrication cost for such packages is relatively high.
SUMMARY OF THE INVENTION
In view of these drawbacks, it is an object of the present invention to overcome the above-mentioned drawbacks and to provide a simpler and reduced cost process for packaging a chip with sensors, while increasing options of subsequent use.
One embodiment of the present invention provides a method for packaging an integrated circuit chip that has a front face with sensors located in a central region and electrical connection areas located in a region that lies between at least one edge of the chip and the central region. According to the method, a rear face of the chip is cemented to a front face of a substrate that includes through-holes, with the rear face of the substrate including electrical connection areas that pass in front of the through-holes such that the through-holes are located laterally with respect to the edge of the chip. The electrical connection areas on the front face of the chip are connected to the electrical connection areas on the substrate through the through-holes, and the chip is embedded in an optically transparent encapsulating material so as to form an encapsulating block on the same side as the front face of the substrate. The substrate is cut around the encapsulating block, following the perimeter of the encapsulating block. In a preferred method, the electrical connection areas on the front face of the chip are connected to the electrical connection areas on the substrate using connection wires, and the connection wires are also embedded in the encapsulating material.
Another embodiment of the present invention provides a semiconductor package that includes an integrated circuit chip, a substrate, electrical connectors, and an encapsulating material. The chip has a front face with sensors in a central region and electrical connection areas in a region between at least one edge and the central region, and the substrate has a front face listened to a rear face of the chip and a rear face having electrical connection areas that pass in front of the through-holes and are located laterally with respect to the edge of the chip. The electrical connectors connect the connection areas on the front face of the chip to the electrical connection areas on the substrate through the holes. The encapsulating material is optically transparent and forms an encapsulating block in which the chip and electrical connectors are embedded. Further, the encapsulating block is affixed to the front face of the substrate, and the perimeter of the substrate follows the perimeter of the encapsulating block. In one preferred embodiment, the perimeter of the encapsulating block is circular and the front face of the encapsulating block has a domed part that forms an optical lens.
Other objects, features, and advantages of the present invention will become apparent from the following detailed description. It should be understood, however, that the detailed description and specific examples, while indicating preferred embodiments of the present invention, are given by way of illustration only and various modifications may naturally be performed without deviating from the present invention.
REFERENCES:
patent: 4165226 (1979-08-01), Kita
patent: 5719440 (1998-02-01), Moden
patent: 6117705 (2000-09-01), Glenn et al.
patent: 6150193 (2000-11-01), Glenn
patent: 6313524 (2001-11-01), Pueschner et al.
patent: 2 136 210 (1984-09-01), None
patent: WO 89/04552 (1989-05-01), None
Preliminary Search Report dated May 9, 2000 for French Patent Application No. 99 10841.
Brechignac Rémi
Exposito Juan
Abraham Fetsum
Bongini Stephen
Fleit Kain Gibbons Gutman & Bongini P.L.
Jorgenson Lisa K.
STMicroelectronics S.A.
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