Process for obtaining high barrier Schottky diode and local inte

Details Process for obtaining high barrier Schottky diode and local inte Process for obtaining high barrier Schottky diode and local inte

1992-07-01

1994-06-14

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 39, 437178, 437200, H01L 21265, H01L 2170

Patent

active

053209710

ABSTRACT:
This invention is a silicon bipolar integrated circuit comprising: a high barrier Schottky diode clamp on a bipolar transistor, the diode clamp comprising a self-aligned PtSi layer on a silicon surface; and a TiN local interconnect partially overlying the PtSi layer. It also is a method of manufacturing an integrated circuit comprising: forming a self-aligned PtSi layer on the adjacent base and collector silicon regions, the PtSi serving as a clamp diode on the bipolar transistor; and forming an etch-patterned TiN layer partially overlying the PtSi layer, the etch-patterned TiN layer serving as local interconnects. The invention provides a PtSi Schottky diode on a bipolar transistor in combination with a TiN local interconnect with the advantages of (i) providing a TiN local interconnect which can be etched without also etching the PtSi, (ii) permitting a wide process window for overetching at contacts, (ii) a TiN local interconnect which is an improvement over a polysilicon local interconnect, and (iv) a high barrier Schottky diode for clamping a bipolar transistor.

REFERENCES:
patent: 4800177 (1989-01-01), Nakamae
patent: 4809052 (1989-02-01), Nishioka et al.
patent: 4978637 (1990-12-01), Liou et al.
patent: 4988423 (1991-01-01), Yamamoto et al.
M. Eizenberg et al., "Shallow silicide contacts formed by using codeposited Pt.sub.2 Si and Pt.sub.1.2 Si films", Appl. Phys. Lett. 37(6), Sep. 15, 1980, pp. 547-549.

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