Process for measuring depth of source and drain

Electricity: measuring and testing – Determining nonelectric properties by measuring electric... – Semiconductors for nonelectrical property

Reexamination Certificate

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C324S762010, C324S1540PB, C257S301000, C438S243000

Reexamination Certificate

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06838866

ABSTRACT:
A process for measuring depth of a source and drain of a MOS transistor. The MOS transistor is formed on a semiconductor substrate on which a trench capacitor is formed and a buried strap is formed between the MOS transistor and the trench capacitor. The process includes the following steps. First, resistances of the buried strap at a plurality of different depths are measured. Next, a curve correlating the resistances with the depths is established. Next, slopes of the resistance to the depth for the curve are obtained. Finally, a depth corresponding to a minimum resistance before the slope of the resistance to the depth reaches to zero is obtained.

REFERENCES:
patent: 6150686 (2000-11-01), Sugiura et al.
patent: 6377067 (2002-04-01), Yang et al.
patent: 6614074 (2003-09-01), Bronner et al.

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