Process for manufacturing semiconductor wafer and...

Details Process for manufacturing semiconductor wafer and... Process for manufacturing semiconductor wafer and...

2001-12-10

2004-05-04

Rose, Robert A. (Department: 3723)

Abrading

Abrading process

Glass or stone abrading

C451S037000

Reexamination Certificate

active

06729941

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a process for manufacturing a semiconductor wafer capable of effectively reducing unevenness having a relatively long wavelength of 0.5 mm or more that remains on a surface of the semiconductor wafer, for example, a silicon wafer (hereinafter may be simply referred to as a “wafer”) after a first polishing step, and improving a surface flatness thereof; and a semiconductor wafer.
BACKGROUND ART
With highly developed integration of devices, even device makers increasingly use polishing machines for film polishing in order to improve uniformity in film thickness and flatness of a film surface after film formation in a device fabrication process.
As shown in
FIG. 12
, however, when surface unevenness having a wavelength of 0.5 mm or more and a relatively large P-V value (width of from a peak to a valley of the unevenness: Peak to Valley) of the order of 0.1 &mgr;m are present on a surface of a wafer W prior to formation of a film F thereon, because thickness of the film F is of the order of 0.2 &mgr;m, although flatness of a surface of the film F is improved by polishing it, uniformity in thickness of the remaining film F after the polishing is greatly affected by the unevenness on the surface of the wafer W.
Therefore, in order to increase a product yield in a device fabrication process, it is necessary to reduce the unevenness on the surface of the wafer W. However, as a matter of fact, there frequently remains unevenness having a relatively long wavelength of 0.5 mm or more on the surface of the wafer W, whereby it is more likely to raise a problem of non-uniformity in thickness of the remaining film in the film polishing process performed by the device makers.
A prior art manufacturing process for a semiconductor wafer, for example, a silicon wafer comprises, as shown in
FIG. 8
, a slicing step
10
, a chamfering step
12
, a lapping step
14
, an etching step
16
, a polishing process
18
, and a cleaning step
20
.
In the polishing process
18
, a wafer W is polished using a polishing apparatus A as shown in FIG.
13
. The polishing apparatus A has a polishing turn table
30
which is rotated at a prescribed rotational speed by a rotary shaft
37
. A polishing cloth P is fixed on an upper surface of the polishing turn table
30
. Numeral reference
33
indicates a work holding plate and the work holding plate
30
is rotated by a rotary shaft
38
with a top weight
35
interposed therebetween. One or more wafers W are held on a bottom surface of the work holding plate
33
by means of an adhesive or the like and pressed onto a surface of the polishing cloth P in the state held on the under surface of the work holding plate
33
, while a polishing agent solution (slurry)
39
is supplied concurrently onto the polishing cloth P through a polishing agent supply tube
34
from a polishing agent supply apparatus (not shown) at a prescribed rate, thus the wafer or wafers being polished through rubbing of a to-be-polished surface of the wafer or wafers against the surface of the polishing cloth P with the polishing agent solution
19
interposed therebetween.
The polishing process
18
includes usually plural steps of a rough polishing step for planarization and a final polishing step for improvement of surface roughness and removal of polishing scratches.
FIG. 8
shows an example of a 3 stage polishing process composed of: a first polishing step
18
a
where a polishing cloth having a relatively high hardness is used for achievement of higher flatness of a silicon wafer; a second polishing step
18
b
where a polishing cloth softer than that used in the first polishing step
18
a
is used for removal of roughness, deformation and cloudiness on a surface of a wafer produced in the first polishing step; and a final polishing step
18
c.
In the rough polishing (including the first polishing and the second polishing in the example of FIG.
8
), there has generally been used a relatively hard polishing cloth wherein a non-woven fabric such as a foamed urethane sheet or a foamed polyester sheet is impregnated with urethane resins, and in the final polishing, there has generally been used a suede-like polishing cloth wherein foamed urethane resins are formed on a base non-woven fabric. As a polishing agent, there is mainly used a dispersion liquid prepared by dispersing fumed silica, colloidal silica or the like in an alkaline solution.
Amounts of polishing stock removal in the polishing steps
18
a
to
18
c
are 5 &mgr;m or more in the first polishing step
18
a
, 0.1 &mgr;m or more in the second polishing step
18
b
and 0.01 &mgr;m or more in the final polishing step
18
c
, respectively. Surface unevenness having a long wavelength of 0.5 mm or more, which can be a problem, is determined in the first polishing step
18
a
where the hardest polishing cloth is used (
FIGS. 9
,
10
and
11
).
FIGS. 9 and 11
show variations in a surface state of a wafer in respective polishing steps and
FIG. 10
schematically shows an influence (transfer) of surface undulations of a polishing cloth especially used in the first polishing step on a shape of the wafer. In the second polishing step, the amount of the polishing stock removal is very small and a polishing cloth in use is soft; hence in the present state the above-described unevenness can not be corrected sufficiently.
That is, as shown in
FIGS. 9 and 11
, (a) on a wafer W
1
after the first polishing, there comes into being a combined state of relatively large surface unevenness having a wavelength of 0.5 mm or more, for example, of the order of from 0.5 mm to 10 mm, and a P-V value of the order of from tens to hundreds of nm, and fine surface unevenness having a wavelength of 0.5 mm or less, for example, of the order of from 0.01 to 0.10 mm, and a P-V value of the order of from tens to hundreds of nm; (b) on a wafer W
2
after the second polishing, a P-V value of surface unevenness having a relatively fine wavelength, for example, of from 0.01 to 0.10 mm is improved and (c) on a wafer W
3
after the final polishing, a P-V value of surface unevenness having a wavelength from 0.01 to 0.10 mm is further improved. However, even after the second polishing and the final polishing, there still remains relatively large surface unevenness having a wavelength of 0.5 mm or more, for example, of the order of from 0.5 mm to 10 mm, and a P-V value ranging from tens to hundreds of nm.
In this way, in the prior art polishing steps, when performing the plural polishing steps, hardness of a polishing cloth used in the first polishing step is the highest and in subsequent steps, polishing cloths hardness of which is lowered in serial sequence of the steps are used, but as stated above there remains a problem that the surface unevenness having a wavelength of 0.5 mm or more can not be corrected.
DISCLOSURE OF THE INVENTION
In order to reduce a P-V value of unevenness having a relatively long wavelength, for example, of 0.5 mm or more in the first polishing, a polishing cloth having higher and uniform hardness should be used, but using such a polishing cloth in the first polishing, an amount of the polishing stock removal becomes large; thus the polishing cloth is loaded and scratches are produced on a wafer surface so that it is practically difficult to use such a polishing cloth.
In view of an amount of polishing stock removal, such a polishing step as the prior art one is performed, but in this case as described above, surface unevenness having a relatively long wavelength remains unchanged. The presence of such surface unevenness can be confirmed by an evaluation where a wafer surface is divided with a specific area, for example, an area 0.5 mm square, a P-V value in each area is confirmed and it is evaluated to what extent the wafer surface is occupied with a specific P-V value. In the prior art polishing step, for example, when the above evaluation is performed in an area 0.5 mm square, there was present even a wafer with a P-V value of the order of 20 nm. In company with a progressive request for

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