Fishing – trapping – and vermin destroying
Patent
1996-04-26
1998-01-06
Graybill, David
Fishing, trapping, and vermin destroying
437206, 437226, 437227, H01L 21283, H01L 2158, H01L 2160, H01L 2170
Patent
active
057054258
ABSTRACT:
A process for manufacturing a semiconductor device comprising: a substrate having an insulating layer and a semiconductor layer lying on the insulating layer, the semiconductor layer having been divided to form a plurality of isolated semiconductor lands by trenches extending through the semiconductor layer to the insulating layer; integrated circuits formed on the respective lands; and conductors running above and across the trenches to electrically connect the integrated circuits on the isolated semiconductor lands.
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Goto Hiroshi
Miura Takao
Monma Yoshinobu
Yamauchi Tunenori
Fujitsu Limited
Graybill David
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