Fishing – trapping – and vermin destroying
Patent
1994-06-06
1995-10-31
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437 31, 437 34, 437 50, 437 58, 437 59, 437162, 437186, 437984, 257269, 257270, 148DIG106, 148DIG123, 148DIG151, H01L 2170
Patent
active
054628881
ABSTRACT:
A process for fabricating transistors on a substrate is disclosed. In accordance with the process, stacks of material are formed on the surface of the substrate. Walls of silicon dioxide are created around the stacks in order to insulate the material within the stacks from the material deposited outside of the walls. A first layer of polycrystalline material is deposited over the substrate and selectively removed such that only those portions of the polycrystalline layer that surround the stacks of material remain. A layer of silicon nitride or silicon dioxide is then formed over the substrate surface. A first resist is then spun on the substrate surface. This resist aggregates near the stacks of material. An isolation mask is generated that leaves exposed only those areas of the substrate that correspond to the area of overlap between the first polycrystalline area and the stacks of material, which also contain a layer of polycrystalline material. The substrate is then subjected to an etchback process to remove the portion of the polysilicon material that overlaps the material in the stacks.
REFERENCES:
patent: 4784971 (1988-11-01), Chiu et al.
patent: 4824796 (1989-04-01), Chiu et al.
patent: 4876217 (1989-10-01), Zdebel
Chiu Tzu-Yin
Erceg Frank M.
Krafty Francis A.
Liu Te-Yin M.
Possanza William A.
AT&T IPM Corp.
Botos Richard J.
Chaudhuri Olik
Pham Long
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