Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Having diverse electrical device
Reexamination Certificate
2001-12-19
2004-02-10
Chaudhuri, Olik (Department: 2823)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Having diverse electrical device
C438S050000, C438S052000, C438S456000, C438S459000, C438S481000, C438S691000, C438S734000, C438S761000
Reexamination Certificate
active
06689627
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention refers to a process for manufacturing components in a semiconductor material wafer with reduction in the starting wafer thickness.
2. Description of the Related Art
As is known, various processes have been developed for manufacturing micro-electromechanical structures, such as micromotors or microactuators usable for finely controlling the position of heads in hard disk drivers.
According to some of these processes, both the micro-electromechanical structures (or microstructures, as referred to hereinafter) and control circuits for controlling the microstructures are made in a same semiconductor material wafer. In a known process, the microstructures are formed according to the following steps:
deposition of a sacrificial layer on the substrate of the wafer;
growth of an epitaxial layer;
definition of rotor regions and stator regions, comprising suspended portions, in the epitaxial layer; and
removal of the sacrificial layer to free the suspended portions of the rotor and stator regions.
In this way, the microstructures may be formed by processing a single face of the semiconductor wafer.
More recently, the use of two distinct semiconductor wafers has been proposed. In a first wafer, the microstructures are formed by deposition of a sacrificial layer, epitaxial growth, and definition of the rotor and stator regions described above, while a second wafer is used as a support for the microstructures. In addition, in the second wafer the control circuits for controlling the microstructures may be formed.
Before removing the sacrificial layer, the two wafers are bonded together, so that the face of the first wafer where the microstructures have been formed is set facing the second wafer. Subsequently, the substrate of the first wafer is partially removed using a mechanical process (milling), so that a residual portion of substrate is obtained having a given thickness, normally of approximately 10-100 &mgr;m. Next, trenches are formed having a such depth to reach the sacrificial layer, which is finally removed so as to free the suspended portions of the rotor and stator regions.
The process described above has, however, certain drawbacks, mainly linked to the step of milling the substrate of the first wafer. In fact, since the final thickness to be achieved is in any case small (10-100 &mgr;m), the mechanical stresses generated by the mechanical members, especially at the end of the milling step, may cause cracks in the semiconductor wafer, in particular in the rotor and stator regions, thus rendering the wafer unusable. A somewhat high number of wafers must thus be discarded, and the process, which falls short of optimal yield, is, on the whole, costly. In addition, the milling process does not enable an accurate control of the thickness of the residual portion of substrate to be obtained.
The same problem is encountered also in electrical circuits formed in a wafer of semiconductor material which, for some reason, is to be thinned.
BRIEF SUMMARY OF THE INVENTION
An embodiment of the present invention provides a process for forming components (whether electronic components or micro-electromechanical structures), that enables a reduction in the mechanical stresses acting on the semiconductor material wafer the thickness of which is to be reduced.
According to an embodiment of the present invention, there is provided a process for manufacturing components in a multi-layer wafer. The process includes the steps of providing a multi-layer wafer comprising a first semiconductor material layer, a second semiconductor material layer, and a dielectric material layer arranged between the first and the second semiconductor material layer, then removing the first semiconductor material layer, initially by mechanically thinning the first semiconductor material layer, so as to form a residual conductive layer, and subsequently by chemically removing the residual conductive layer. In one application, the multi-layer wafer is bonded to a first wafer of semiconductor material, with the second semiconductor material layer facing the first wafer, after micro-electromechanical structures have been formed in the second semiconductor material layer of the multi-layer wafer.
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Gui, C. et al., “Fabrication of Multi-Layer Substrates for High Aspect Ratio Single Crystalline Microstructures,”Sensors and Actuators A, 70(1-2):61-66, Oct. 1, 1998.
Bombonati Mauro
Ferrera Marco
Fischetti Alessandra
Mottura Marta
Zerbini Bernardino
Bennett II Harold H.
Brewster William M
Chaudhuri Olik
Jorgenson Lisa K.
Seed IP Law Group PLLC
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