Process for manufacturing integrated bi-polar transistors of ver

Details Process for manufacturing integrated bi-polar transistors of ver Process for manufacturing integrated bi-polar transistors of ver

1982-06-25

1984-11-13

Saba, William G.

Metal working

Method of mechanical manufacture

Assembling or joining

29576E, 29578, 29590, 29591, 148 15, 148174, 148175, 148188, 156628, 156643, 156653, 156657, 357 20, 357 50, 357 59, 357 91, H01L 21265, H01L 21302, H01L 21283

Patent

active

044817061

ABSTRACT:
A process is provided for manufacturing bi-polar transistors integrated on silicon. To form transistors of very small dimensions, a layer of polycrystalline silicon is deposited (after a localized oxidization step) which is etched and which is doped so as to serve as doping source for P.sup.+ extrinsic base regions of the transistor. After doping of the P intrinsic base, the oxide and/or nitride is then deposited at low pressure which is implanted with an impurity facilitating dissolution thereof. On the vertical walls of the polycrystalline silicon around the base, the nitride is not dissolved. Elsewhere it is easily dissolved. Advantage is taken of the oxide or nitride thickness which remains to form by diffusion of an N.sup.+ emitter region which will not extend laterally as far as the P.sup.+ type extrinsic base but which will allow to remain an intrinsic base of very small thickness. The emitter diffusion may take place through a second polycrystalline silicon layer.

REFERENCES:
patent: 4209349 (1980-06-01), Ho et al.
patent: 4319932 (1982-03-01), Jambotkar
Nakashiba et al., "Advanced PSA Technology . . . Bipolar LSI", IEEE Trans. on Electron Devices, vol. ED-27, No. 8, Aug. 1980, pp. 1390-1394.
Antipov, I., "Undercut Contacts for Poly Si Base", I.B.M. Tech. Discl. Bull., vol. 22, No. 8B, Jan. 1980, pp. 3693-3694.
Yeh, T. H., "Self-Aligned Integrated . . . Structures", IBM Tech. Discl. Bull., vol. 22, No. 9, Feb. 1980, pp. 4047-4051.

Affiliated with

Also associated with

Rating

Process for manufacturing integrated bi-polar transistors of ver does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for manufacturing integrated bi-polar transistors of ver, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for manufacturing integrated bi-polar transistors of ver will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2354098