Process for manufacturing bi-cmos type semiconductor integrated

Details Process for manufacturing bi-cmos type semiconductor integrated Process for manufacturing bi-cmos type semiconductor integrated

1991-03-06

1992-04-21

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 56, 437 33, 437 69, 148DIG9, H01L 21265

Patent

active

051067692

ABSTRACT:
A process of manufacturing a Bi-CMOS type semiconductor integrated circuit according to the present invention by to providing an isolation procedure wherein PMOS and NMOS transistor isolation areas are selectively oxidixed so as to form a second isolation oxide film, simultaneous with the selective oxidation of the polysilicon layer deposited on the bipolar transistor area after the semiconductor substrate in the bipolar transistor isolation area, which has been removed to a required thickness and selectively oxidized so as to form a thick first isolation oxide film for the bipolar transistor.

REFERENCES:
patent: 4406049 (1983-09-01), Tam et al.
patent: 4777147 (1988-10-01), Scott et al.
patent: 4879255 (1989-11-01), Deguchi et al.
patent: 4889829 (1989-12-01), Kawai
patent: 4946798 (1990-08-01), Kawakatsu
patent: 4957874 (1990-09-01), Soejima

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