Electric lamp or space discharge component or device manufacturi – Process – With assembly or disassembly
Patent
1997-03-18
2000-04-04
Ramsey, Kenneth J.
Electric lamp or space discharge component or device manufacturi
Process
With assembly or disassembly
445 58, H01J 902
Patent
active
060454253
ABSTRACT:
A method for manufacturing arrays of field emission tips, suitable for use in field emission displays (FEDs), begins by depositing a conductive cathode layer over a substrate and then patterning the conductive cathode layer to define a set of cathode structures on which the array of tips are to be formed. A layer of a insulator material is deposited and then a layer of lift-off material is deposited. The lift-off material is capable of being selectively etched with respect to the insulator layer. The insulator material layer and lift-off material layer are patterned to define a set of apertures in which field emission tips are to be formed. Next, tip material is deposited using an unbiased high density plasma chemical vapor deposition (HDPCVD) process to form sharp field emission tips in the apertures. The HDPCVD process also forms a sacrificial layer of islands of tip material on top of the patterned layer of lift-off material. After the formation of the field emission tips, the patterned layer of lift-off material is removed using a wet chemical etchant that also removes sacrificial layer of tip material. A layer of fill material is deposited and planarized so as to fill the apertures in which the tips were formed. A gate layer is then deposited and patterned to form gate structures. A subsequent wet etch removes the fill material surrounding the emitter tips.
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Katherine Derbyshire, "Beyond AMLCDs: Field emission displays?", Solid State Technology, Nov. 1994, pp. 55-65.
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Peter Singer, "Flat Panel Processing Trends", Semiconductor International, Nov. 1995, p. 90.
Bothra Subras
Qian Ling Q.
Ramsey Kenneth J.
VLSI Technology Inc.
Williams Gary S.
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