Process for manufacturing an integrated insulated-gate field-eff

Details Process for manufacturing an integrated insulated-gate field-eff Process for manufacturing an integrated insulated-gate field-eff

1984-05-10

1985-06-04

Hearn, Brian E.

Metal working

Method of mechanical manufacture

Assembling or joining

29578, 29576W, H01L 2176

Patent

active

045205531

ABSTRACT:
A process is described for manufacturing integrated insulated-gate field-effect transistors comprising contacts on both the source region and the drain region which are self-aligned with respect to the gate electrode. In this process the gate area and the areas of the aforementioned regions are defined by means of an oxidation masking layer, and on these regions by employing the oxidation masking layer, there are produced insulator layers which are relatively thick compared to the gate insulator layer.

REFERENCES:
patent: 3899372 (1975-08-01), Esch et al.
patent: 4047284 (1977-09-01), Spadea
patent: 4080718 (1978-03-01), Richman
patent: 4135289 (1979-01-01), Brews et al.

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