Fishing – trapping – and vermin destroying
Patent
1994-11-22
1996-10-29
Niebling, John
Fishing, trapping, and vermin destroying
437220, 26427217, H01L 2156, H01L 2158, H01L 2160
Patent
active
055696252
ABSTRACT:
A semiconductor process includes a stage, a semiconductor chip which is mounted on the stage, a plurality of electrode members which are wire bonded to the semiconductor chip, where a first gap is formed between the stage and one electrode member and a second gap is formed between two electrode members, a plurality of leads including inner leads which are wire bonded to at least one of the semiconductor chip and the electrode members and electrically connected thereto, and a resin package which encapsulates the semiconductor chip, the stage, the electrode members and the inner leads by a resin. The resin fills the first and second gaps, so that the stage and the one electrode member are isolated and the two electrode members are isolated.
REFERENCES:
patent: Re34227 (1993-04-01), Asher et al.
patent: 3930114 (1975-12-01), Hodge
patent: 4043027 (1977-08-01), Birchler et al.
patent: 4677526 (1987-06-01), Muehling
patent: 4680617 (1987-07-01), Ross
patent: 4801765 (1989-01-01), Moyer et al.
patent: 5138430 (1992-08-01), Gow, 3rd et al.
patent: 5258575 (1993-11-01), Beppu et al.
patent: 5403784 (1995-04-01), Hashemi et al.
Kasai Junichi
Sakoda Hideharu
Tsuji Kazuto
Yoneda Yoshiyuki
Fujitsu Limited
Graybill David E.
Niebling John
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