Static information storage and retrieval – Interconnection arrangements
Reexamination Certificate
2005-12-22
2009-10-20
Nguyen, Tuan T (Department: 2824)
Static information storage and retrieval
Interconnection arrangements
C257S002000, C365S148000, C365S163000, C438S095000, C438S128000
Reexamination Certificate
active
07606056
ABSTRACT:
A process for manufacturing a phase change memory array includes the steps of: forming a plurality of phase change memory cells in an array region of a semiconductor wafer, the phase change memory cells arranged in rows and columns according to a row direction and to a column direction, respectively; forming a control circuit in a control region of the semiconductor wafer; forming a plurality of first bit line portions for mutually connecting phase change memory cells arranged on a same column; forming first level electrical interconnection structures; and forming second level electrical interconnection structures above the first level electrical interconnection structures. The first level electrical interconnection structures include second bit line portions laying on and in contact with the first bit line portions and projecting from the first bit line portions in the column direction for connecting the first bit line portions to the control circuit.
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Aina Laura
Bez Roberto
Marangon Maria Santina
Pellizzer Fabio
Piva Roberta
Iannucci Robert
Jorgenson Lisa K.
Nguyen Tuan T
Seed IP Law Group PLLC
Sofocleous Alexander
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