Process for manufacture of high power MOSFET with laterally dist

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357 20, 357 41, 357 59, H01L 2978

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045933022

ABSTRACT:
A high power MOSFET structure consists of a plurality of source cells distributed over the upper surface of a semiconductor chip, with a drain electrode on the bottom of the chip. Each of the source cells is hexagonal in configuration and is surrounded by a narrow, hexagonal conduction region disposed beneath a gate oxide. The semiconductor material beneath the gate oxide has a relatively high conductivity, with the carriers being laterally equally distributed in density beneath the gate oxide. The high conductivity hexagonal channel is formed in a low conductivity epitaxially formed region and consists of carriers deposited on the epitaxial region prior to the formation of the source region. Symmetrically arranged gate fingers extend over the upper surface of the device and extend through and along slits in the upper source metallizing and are connected to a polysilicon gate grid which overlies the gate oxide.

REFERENCES:
patent: 4015278 (1977-03-01), Fukuta
patent: 4072975 (1978-02-01), Ishitani
patent: 4145700 (1979-03-01), Jambutkar
patent: 4148047 (1979-04-01), Hendrickson
H. Collins et al., "New Technology-Hexfet, A New Power Technology, Cuts On-Resistance, Boosts Ratings," Electronic Design, Jun. 7, 1979, 8 pages.
R. Cady et al., "Integ, Tech. for Closed Field-Effect Trans.," IBM Tech. Discl. Bull., vol. 16, #11, Apr. 1974, pp. 3519, 3520.

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