Process for manufacture of a vertical DMOS transistor

Details Process for manufacture of a vertical DMOS transistor Process for manufacture of a vertical DMOS transistor

1988-08-22

1989-08-01

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437147, 437153, 437228, H01L 2122, H01L 2178

Patent

active

048533459

ABSTRACT:
A process for forming a vertical n-channel DMOS transistor uses a common deposition step to form a phosphorus-rich predeposit simultaneously over the polysilicon gate electrode, over a central surface portion of a p-well region and over the back surface drain region of the chip. This predeposit is followed by a common drive-in step to form an n-type source region within the p-well region, and to make the polysilicon gate electrode and the back surface more conductive. In addition, the process uses the source region contact mask as a shadow mask for anistropically etching a via hole in the source region so that the source metallization can also contact the p-well region and serve also as a shorting contact to the p-well.

REFERENCES:
patent: 4372034 (1983-02-01), Bohr
patent: 4443931 (1984-04-01), Baliga et al.
patent: 4502069 (1985-02-01), Schuh
patent: 4503598 (1985-03-01), Vora et al.
patent: 4516143 (1985-05-01), Love
patent: 4561168 (1985-12-01), Pitzer et al.
patent: 4716126 (1987-12-01), Cogan
patent: 4774198 (1988-09-01), Contiero et al.
patent: 4785344 (1988-11-01), Franz
patent: 4798810 (1989-01-01), Blanchard et al.
G. Bell and W. Ladenhauf, "SIPMOS Technology, an Example of VLSI Precision Realized with Standard LSI for Power Transistors," Siemens Forsch.-u. Entwickl.-Ber. Bd. 9(1980), Nr. 4, Springer-Verlag 1980.

Affiliated with

Also associated with

Rating

Process for manufacture of a vertical DMOS transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for manufacture of a vertical DMOS transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for manufacture of a vertical DMOS transistor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-131412