Process for making transistors with doped oxide densification

Details Process for making transistors with doped oxide densification Process for making transistors with doped oxide densification

1983-02-01

1984-10-16

Ozaki, G.

Metal working

Method of mechanical manufacture

Assembling or joining

29578, 148187, 156641, 156644, 427 85, H01L 21324

Patent

active

044766211

ABSTRACT:
A method of fabricating CMOS integrated circuits including the ordered steps of: depositing a layer of phosphorus doped silicon oxide; heating the oxide layer at a temperature and duration sufficient to reflow and densify it; forming contact apertures in the oxide layer for exposing source and drain regions of transistors; and cleaning the wafer in an etchant solution for rounding off sharp edges on the oxide layer prior to contact metallization. In a preferred embodiment, all steps between forming contact apertures and through metallization are formed at a temperature that is lower than the temperature that will cause flow of the oxide layer.

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patent: 4314857 (1982-02-01), Aitken
patent: 4348802 (1982-09-01), Shirato
patent: 4349584 (1982-09-01), Flatley et al.
patent: 4371403 (1983-02-01), Ikubo et al.

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