Process for making self-aligning thin film transistors

Details Process for making self-aligning thin film transistors Process for making self-aligning thin film transistors

1987-10-30

1988-08-30

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437228, 437229, 437909, 437181, 148DIG137, 357 237, 430312, H01L 21265, H01L 21465, H01L 2144, H01L 2148

Patent

active

047677236

ABSTRACT:
A process for making a self-aligned thin film transistor, said process comprising the steps of: (1) providing a gate which comprises a glass substrate, a transparent electrode on top thereof, and a metal electrode on top of said transparent electrode, (2) forming a stack by depositing over said gate a triple layer structure consisting of gate dielectric material, active material and a top passivating dielectric, (3) coating the top of said triple layer with a dual-tone photoresist, (4) exposing said photoresist from the top through a mask having transparent areas, opaque areas and areas transparent to selective wavelengths, using broad band UV light, (5) developing the photoresist by treatment with a solvent, (6) etching the stack with a liquid etchant through to the glass substrate, (7) exposing the photoresist from the bottom through the glass substrate using near UV light, (8) developing the photoresist with a solvent, and (9) etching off the top passivating layer of the stack.

REFERENCES:
patent: 4599246 (1986-07-01), Harajira et al.
patent: 4700458 (1987-10-01), Suzuki et al.
T. Kodama et al, "A Self-Alignment Process for Amorphous Silicon Thin Film Transistors", IEEE Electron Device Ltrs., vol. EDL-3, No. 7, Jul. 1982, pp. 187-189.

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