Fishing – trapping – and vermin destroying
Patent
1989-11-09
1990-08-07
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 29, 437 34, 437 45, 437 57, 437913, 148DIG150, 148DIG77, H01L 21336
Patent
active
049467999
ABSTRACT:
A process for making a silicon-on-insulator MOS transistor is disclosed which includes forming an implanted region on the source side of the gate electrode for making contact to the body node. A contact region of the same conductivity type as the body node, (for example, a p+ region for an n-channel transistor) is formed within the source region in a self-aligned fashion relative to sidewall oxide filaments on the source side of the gate electrode. The lightly-doped drain extension of the source region remains disposed between the contact region and the body node at the surface, but the contact region extends below the depth of the lightly-doped drain region to make contact to the body node. Ohmic connection is then made between the abutting source region and the contact region, for example by way of silicidation. Since the contact region is of the same conductivity as the body node, a non-rectifying ohmic contact is made between the source and body nodes of the transistor. For SOI CMOS technology, no additional photolithographic or implant steps are required for formation of the contact, as the source/drain implant masks required for the masking of opposite conductivity type regions and the associated implants can be used in the formation of the contact region.
REFERENCES:
patent: 4232327 (1980-11-01), Hsu
patent: 4312680 (1982-01-01), Hsu
patent: 4753896 (1988-06-01), Matloubian
Blake Terence G. W.
Lu Hsindao
Braden Stanton C.
Comfort James T.
Hearn Brian E.
Quach T. N.
Sharp Melvin
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