Process for making complementary transistors by sequential impla

Details Process for making complementary transistors by sequential impla Process for making complementary transistors by sequential impla

1982-12-09

1984-09-11

Roy, Upendra

Metal working

Method of mechanical manufacture

Assembling or joining

29571, 148 15, 148187, 357 42, 357 91, H01L 754, H01L 21265, B01J 1700

Patent

active

044701918

ABSTRACT:
A simple process is provided for making a planar CMOS structure wherein isolation regions required by bulk CMOS structures are first formed, an N channel device field region is self-aligned to an N well region in a semiconductor substrate and a refractory material is twice defined for forming P and N channels, the first definition masking P channel source and drain regions while defining the N channel and the second definition defining the P channel while using a photoresist layer to mask the N channel. In the process, a technique which uses a single mask level defines the well region and self-aligns the necessary field doping to the well region to provide closely spaced N and P channel devices.

REFERENCES:
patent: 3700507 (1972-10-01), Murray
patent: 3999213 (1976-12-01), Brandt et al.
patent: 4002501 (1977-01-01), Tamura
patent: 4033797 (1977-07-01), Dill et al.
patent: 4045250 (1977-08-01), Dingwall
patent: 4183134 (1980-01-01), Oehler et al.
patent: 4224733 (1980-09-01), Spadea
patent: 4244752 (1981-01-01), Henderson, Sr. et al.
patent: 4306916 (1981-12-01), Wollesen et al.
patent: 4382827 (1983-05-01), Romano-Moran et al.
patent: 4385947 (1983-05-01), Halfacre et al.
patent: 4399605 (1983-08-01), Dash et al.
patent: 4412375 (1983-11-01), Mathews

Affiliated with

Also associated with

Rating

Process for making complementary transistors by sequential impla does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for making complementary transistors by sequential impla, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for making complementary transistors by sequential impla will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1188811