Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2006-12-12
2006-12-12
Le, Thong Q. (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185260
Reexamination Certificate
active
07149126
ABSTRACT:
A fast low voltage ballistic program, ultra-short channel, ultra-high density, dual-bit multi-level flash memory is described. The structure and operation of this invention is enabled by a twin MONOS cell structure having an ultra-short control gate channel of less than 40 nm, with ballistic injection which provides high electron injection efficiency and very fast program at low program voltages of 3˜5V. The ballistic MONOS memory cell is arranged in the following array: each memory cell contains two nitride regions for one word gate, and ½ a source diffusion and ½ a bit diffusion. Control gates can be defined separately or shared together over the same diffusion. Diffusions are shared between cells and run in parallel to the side wall control gates, and perpendicular to the word line.
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Chang et al., “A New Songs Memory Using Source-Side Injection for Programming”, IEEE Electron Device Letters, vol. 19, No. 7, pp. 253-255, Jul. 1998.
Ogura et al., “Low Voltage, Low Current, High Speed Program Step Split Gate Cell with Ballistic Direct Injection for EEPROM/Flash”, IEDM 1998, p. 987.
Hayashi Yutaka
Ogura Seiki
Ogura Tomoko
Ackerman Stephen B.
Le Thong Q.
New Halo, Inc.
Pike Rosemary L. S.
Saile Ackerman LLC
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