Process for making a self-aligned silicide shunt

Fishing – trapping – and vermin destroying

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437193, 437194, 437 33, 437984, 148DIG19, 148DIG105, 156657, H01L 21283

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active

048837725

ABSTRACT:
A silicide base shunt 50 and method of fabricating it are disclosed for a bipolar transistor. The base shunt 50 is fabricated using the first layer metal 36, 39 as a mask to etch silicon dioxide 27 surrounding the emitter 34 to thereby expose the underlying silicon epitaxial layer 24. Nickel or copper are then deposited onto the silicon 24 to form a region of silicide 50 extending from a base contact 36 to closely proximate the emitter 34, thereby minimizing the resistance of the extrinsic base region 24 of the transistor.

REFERENCES:
patent: 4128845 (1978-12-01), Sakai
patent: 4188707 (1980-02-01), Asano et al.
patent: 4199380 (1980-04-01), Farrell et al.
patent: 4423548 (1984-01-01), Hulseweh
patent: 4531282 (1985-07-01), Sakai et al.
patent: 4581319 (1986-04-01), Wieder et al.
Tang et al., "Subnanosecond Self-Aligned I.sup.2 L/MTL Circuits " IEEE Trans. Elect. Devices, vol. ED. 27, No. 8, Aug. 1980, pp. 1379-1384.
Blakeslee et al., "Aluminum Etch Mask for Plasma Etching"IBM Tech. Ins. Bull., vol. 21, No. 3, Aug. 1978, pp. 1256-1258.

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