Process for making a mask ROM with self-aligned coding technolog

Details Process for making a mask ROM with self-aligned coding technolog Process for making a mask ROM with self-aligned coding technolog

1994-08-09

1995-12-05

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 45, 437 52, H01L 21265

Patent

active

054728983

ABSTRACT:
A self-aligned coding process for mask ROM is disclosed. First, a substrate having a plurality of bit-lines formed therein, a gate oxide layer formed on the bit-lines, and a plurality of word-lines formed on the gate oxide, which together construct an array of memory cells, is provided. Next, a barrier layer is formed on the word-lines. A silicon dioxide layer is formed on the gate oxide between the word-lines by using liquid phase deposition, wherein the thickness of the silicon dioxide layer is larger than that of the word-lines. Then, the barrier layer is removed. A mask layer is formed on the substrate exposing parts of the memory cells that will be programmed. Finally, impurities are implanted into the substrate not covered by the mask layer and the silicon dioxide layer to make the memory cells that will be programmed operating in a first state, and leave other non-programmed memory cells operating in a second state.

REFERENCES:
patent: 5306657 (1994-04-01), Yang
patent: 5318921 (1994-06-01), Hsue et al.
patent: 5418175 (1995-05-01), Hse et al.
Homma, et al., A Selective SiO.sub.2 film-formation Technology Using Liquid-Phase Deposition for fully Planarized Multilevel Interconnections, J. Electrochem. Soc., vol. 140, No. 8, Aug. 1993.

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