Process for making a discontinuous source/drain formation for a

Details Process for making a discontinuous source/drain formation for a Process for making a discontinuous source/drain formation for a

1997-12-19

1999-12-21

Bowers, Charles

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Isolation by pn junction only

438296, 438637, 438675, 257365, H01L 2128, H01L 21336

Patent

active

060048611

ABSTRACT:
A semiconductor process including forming a gate dielectric on a semiconductor substrate. First and second conductive gates are then formed on the gate dielectric. The conductive gates are aligned over respective channel regions of the substrate. The channel regions are laterally displaced between respective pairs of source/drain regions. A first interlevel dielectric is then deposited on the substrate and source/drain vias are then formed in the interlevel dielectric. The source/drain vias terminate on the pairs of source/drain regions. Thereafter, a source/drain impurity is introduced into the source/drain regions to form source/drain structures. A conductivity type of the source/drain structures is opposite a conductivity type of the field region. The first interlevel dielectric substantially prevents the source/drain impurity from entering the field region of the semiconductor substrate. In this manner, adjacent source/drain regions displaced on either side of the field region 106 are isolated from one another.

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