Process for making a bipolar junction transistor with a self-ali

Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – With specified electrode means

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257588, 257592, H01L 27082

Patent

active

055258336

ABSTRACT:
In accordance with the invention, the emitter region of a BJT is formed prior to the formation of the base contact regions so that the base contact regions are not enlarged during a thermal cycle used to form the emitter and the base contact regions remain small. Preferably, the base contact regions are formed by ion implantation after the emitter is formed. In addition, the base interconnect links may be metal (or polycide) rather than polysilicon so that the base interconnect resistance is reduced.
This results in the following advantages:

REFERENCES:
patent: 4752591 (1988-06-01), Beitman
patent: 5006416 (1991-04-01), De Jong et al.
patent: 5006476 (1991-04-01), De Jong et al.
patent: 5059549 (1991-10-01), Furuhata
patent: 5187109 (1993-02-01), Cook et al.
patent: 5194926 (1993-03-01), Hayden
patent: 5268314 (1993-12-01), Conner
patent: 5328862 (1994-07-01), Goo
patent: 5358879 (1994-10-01), Brady et al.
Hori et al., "A Self-Aligned Pocket Implantation (SPI) Technology for 0.2 micron Dual-Gate CMOS", IEEE Electron Device Letters, vol. 13, No. 4, Apr. 1992, pp. 174-176.
"Simplified Lightly Doped Drain Process", IBM Technical Disclosure Bulletin, vol. 30, No. 12, May 1988, pp. 180-181.

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