Process for laminating electrically addressable display

Electric lamp or space discharge component or device manufacturi – Process – With assembly or disassembly

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C445S025000

Reexamination Certificate

active

06902454

ABSTRACT:
A process laminates a flexible electrically addressable display and includes steps of: providing a flexible, electrically addressable liquid crystal display having two surfaces, placing a protective sheet over one of the surfaces, and heating and pressing the protective sheet to adhere it to the surface. The display has a flexible substrate on which is formed a transparent, first electrically conductive layer. A light modulating layer having liquid crystalline material and a polymeric binder is disposed on the electrically conductive layer, and a patterned layer having areas of opaque electrically conductive material is formed on the light modulating layer. A dielectric layer has apertures to the areas of opaque electrically conductive material and to the first electrically conductive layer is disposed on the patterned layer, and a second electrically conductive layer overlying the dielectric layer extends into the contact apertures to the areas of opaque electrically conductive material and the first electrically conductive layer.

REFERENCES:
patent: 3816789 (1974-06-01), Sawagata et al.
patent: 4023259 (1977-05-01), Kubota et al.
patent: 4060654 (1977-11-01), Quenneville
patent: 4310577 (1982-01-01), Davison et al.
patent: 4422732 (1983-12-01), Ditzik
patent: 4435047 (1984-03-01), Fergason
patent: 4526818 (1985-07-01), Hoshikawa et al.
patent: 4685771 (1987-08-01), West et al.
patent: 4721883 (1988-01-01), Jacobs et al.
patent: 5055662 (1991-10-01), Hasegawa
patent: 5085605 (1992-02-01), Itani et al.
patent: 5116528 (1992-05-01), Mullen et al.
patent: 5137484 (1992-08-01), Bohannon
patent: 5142391 (1992-08-01), Fujiwara et al.
patent: 5184969 (1993-02-01), Sharpless et al.
patent: 5266865 (1993-11-01), Haizumi et al.
patent: 5365356 (1994-11-01), McFadden
patent: 5437811 (1995-08-01), Doane et al.
patent: 5583670 (1996-12-01), Iijima et al.
patent: 5766694 (1998-06-01), West et al.
patent: 5767931 (1998-06-01), Paczkowski
patent: 5830028 (1998-11-01), Zovko et al.
patent: 5838409 (1998-11-01), Tomono et al.
patent: 5854664 (1998-12-01), Inoue et al.
patent: 5868892 (1999-02-01), Klima, Jr.
patent: 5872608 (1999-02-01), Inoue et al.
patent: 5942066 (1999-08-01), Sunaga et al.
patent: 5978065 (1999-11-01), Kawasumi et al.
patent: 6002383 (1999-12-01), Shimada
patent: 6036568 (2000-03-01), Murouchi et al.
patent: 6052137 (2000-04-01), Shimada
patent: 6211938 (2001-04-01), Mori
patent: 6275277 (2001-08-01), Walker et al.
patent: 6330099 (2001-12-01), Sojourner et al.
patent: 6556260 (2003-04-01), Itou et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Process for laminating electrically addressable display does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for laminating electrically addressable display, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for laminating electrically addressable display will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3516317

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.