Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2001-04-09
2002-10-01
Powell, William A. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C216S067000, C216S079000, C216S099000, C216S100000, C438S723000, C438S743000, C438S745000, C438S754000, C438S756000
Reexamination Certificate
active
06458710
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The present invention relates to methods used to fabricate semiconductor devices and more specifically to a method used to form uniform contact holes in insulator and in semiconductor materials.
(2) Description of Prior Art
Micro-miniaturization, or the ability to fabricate semiconductor devices using sub-micron features, has allowed increased device density, increased device performance, and a reduction of processing costs, to be realized. The smaller device features, achieved via micro-miniaturization, has allowed performance degrading, parasitic capacitances to be reduced, while a greater number of smaller semiconductor chips, still possessing equal or increased device densities when compared to counterpart, larger semiconductor chips, have resulted in decreased processing costs for an individual smaller chip. The advent of micro-miniaturization has in part been accomplished via advances in specific semiconductor disciplines such as photolithography and dry etching. The use of more sophisticated exposure cameras, as well as the development of more sensitive photoresist materials, have allowed the sub-micron images to be routinely defined in the sensitive photoresist layers. In addition the development of advanced dry etching tools and processes have allowed the sub-micron images in overlying, masking photoresist shapes to be successfully transferred to underlying materials, such as insulator and conductive layers, used for the fabrication of the semiconductor devices.
The ability to define sub-micron features in insulator or conductive layers via dry etching procedures, using an overlying photoresist shape as an etch mask, is dependent on the selectivity of the dry etching procedure. For example when defining an opening in an insulator layer, using an overlying photoresist shape as an etch mask, a dry etch chemistry featuring a high etch rate of insulator layer, and a lower etch rate for the masking photoresist shape, is desired. This combination however can result in polymer formation of the sides of the insulator layer, exposed in the contact hole, at various stages of the opening procedure, possibly interfering with the remaining portion of the opening procedure, thus resulting in a non-uniform definition for a specific opening, or non-uniformity between openings. This invention will describe a novel procedure for defining openings in an insulator layer via a combination dry-wet etching procedure, in which the polymer layer, formed during the dry etching component of the procedure, is removed prior to initiation of the wet etch component. This novel procedure allows a partially defined opening to be subjected to a wet etch cycle, after the overlying photoresist shape has been removed, which in turn allows any oxide formed on exposed regions of the opening formed during the photoresist stripping procedure, to also be removed. Prior art, such as Kinzer, in U.S. Pat. No. 5,629,237, describe a dry-wet procedure for defining an opening in an insulator layer, however that prior performs the wet etch component of the opening prior to photoresist and polymer removal, thus not addressing polymer on the sides of the dry etched opening, which can interfere or retard the wet etch cycle.
SUMMARY OF THE INVENTION
It is an object of this invention to define a contact hole opening in an insulator layer, and in a top portion of an underlying semiconductor region.
It is another object of this invention to employ a dry etch-wet etch procedure, to define the contact hole opening.
It is still another object of this invention to remove the defining, masking photoresist shape, and polymer layer, from the sides of the dry etched contact hole, after the dry etching component of the contact hole opening procedure.
It is still yet another object of this invention to perform the wet etch component of the contact hole opening procedure after stripping of the photoresist shape and polymer layer, to allow oxide formed on exposed semiconductor regions of the contact hole opening to be removed, and to improve the uniformity of the contact hole openings.
In accordance with the present invention a method of defining a contact hole opening in a insulator layer, and in a top portion of an underlying semiconductor region, using a combination dry etch-wet etch procedure, is described. An insulator layer is deposited on a semiconductor substrate, to a thickness greater than the desired final thickness, to allow for thinning as a result of a subsequent wet etch procedure. After definition of a masking photoresist shape, a tapered, first portion of the contact hole is defined in a top portion of the insulator layer via an isotropic dry etch procedure. An anisotropic dry etch procedure is then used to define the straight walled, contact hole opening in the remaining portion of insulator layer, and in a top portion of the semiconductor region, also resulting in the formation of a polymer layer on the exposed surfaces of the contact hole. Stripping of the masking photoresist shape, and of the polymer layer, results in oxide growth of the exposed semiconductor surfaces of the contact hole. A wet etch procedure is then employed to remove oxide from the surfaces of the semiconductor region exposed in the contact hole, as well as to controllably recess the exposed insulator surfaces, resulting in uniform contact holes located in the entire semiconductor substrate.
REFERENCES:
patent: 4698128 (1987-10-01), Berglund et al.
patent: 4939105 (1990-07-01), Langley
patent: 5219791 (1993-06-01), Freiberger
patent: 5371042 (1994-12-01), Ong
patent: 5629237 (1997-05-01), Wang et al.
patent: 5795793 (1998-08-01), Kinzer
patent: 5877092 (1999-03-01), Lee et al.
patent: 5912185 (1999-06-01), Kwon
patent: 6025273 (2000-02-01), Chen et al.
ESM Limited
Ostrolenk Faber Gerb & Soffen, LLP
Powell William A.
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