Process for forming semiconductor-on-insulator device

Details Process for forming semiconductor-on-insulator device Process for forming semiconductor-on-insulator device

1995-01-03

1997-09-23

Graybill, David

Fishing, trapping, and vermin destroying

437 62, 437186, H01L 2184

Patent

active

056703872

ABSTRACT:
Interconnects (22 and 32) are formed within an insulating base material of a first substrate. Trenches (54) and portions of an insulating layer (52) are formed within a second substrate (50). The two substrates are bonded by fusion. The second substrate is polished back to form semiconductor islands (81-83) over the first substrate. Active regions of transistors are formed within the islands (81-83). Conductive plugs (131-134) are made between portions of the active regions and interconnects (22, 32, and 141) that underlie or overlie the semiconductor islands (81-83). Embodiments of the present invention allow higher component density, better thickness control for SOI regions, and lower leakage current compared to SOI layers that use LOCOS-type field isolation.

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