Process for forming microstructures

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal

Reexamination Certificate

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Details

C438S622000, C438S678000, C257SE21314, C257SE21219

Reexamination Certificate

active

11102982

ABSTRACT:
The present invention relates to a process for forming microstructures on a substrate. A plating surface is applied to a substrate. A first layer of photoresist is applied on top of the plating base. The first layer of photoresist is exposed to radiation in a pattern to render the first layer of photoresist dissolvable in a first pattern. The dissolvable photoresist is removed and a first layer of primary metal is electroplated in the area where the first layer of photoresist was removed. The remainder of the photoresist is then removed and a second layer of photoresist is then applied over the plating base and first layer of primary metal. The second layer of photoresist is then exposed to a second pattern of radiation to render the photoresist dissolvable and the dissolvable photoresist is removed. The second pattern is an area that surrounds the primary structure, but it does not entail the entire substrate. Rather it is an island surrounding the primary metal. The exposed surface of the secondary metal is then machined down to a desired height of the primary metal. The secondary metal is then etched away.

REFERENCES:
patent: 2005/0067286 (2005-03-01), Ahn et al.
patent: 2005/0067292 (2005-03-01), Thompson et al.
patent: 2005/0202667 (2005-09-01), Cohen et al.
patent: 2006/0134819 (2006-06-01), Tang et al.
patent: 0567332 (1993-10-01), None
patent: WO 2004/056698 (2004-07-01), None
Jun-Bo Yoon et al., Monolithic Integration of 3-D Electroplated Microstructures With Unlimited Number of Levels Using Planarization With A Scarificial Metallic Mold (PSMM), pp. 624 thru 629.

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