Process for forming low sheet resistance polysilicon having anis

Details Process for forming low sheet resistance polysilicon having anis Process for forming low sheet resistance polysilicon having anis

1984-07-12

1985-12-31

Roy, Upendra

Metal treatment

Compositions

Heat treating

29576B, 29571, 148175, 148187, 148DIG4, 156643, 156646, 357 59, 357 91, H01L 21265, H01L 21268

Patent

active

045619077

ABSTRACT:
A method for forming highly doped, low sheet resistance, anisotropically etched polysilicon using heat pulse annealing and plasma etching. The combination of low sheet resistance and anisotropic etch behavior is provided by heat pulse annealing for a time which corresponds to a characteristic transition region of the sheet resistance-annealing time curve.

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patent: 4420344 (1983-12-01), Davies et al.
patent: 4455738 (1984-06-01), Houston et al.
patent: 4466179 (1984-08-01), Kasten
D'Ouville et al, J. Appl. Phys., 53 (1982) 5086.

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