Process for forming isolation trenches in silicon semiconductor

Details Process for forming isolation trenches in silicon semiconductor Process for forming isolation trenches in silicon semiconductor

1989-09-21

1990-09-18

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 26, 437 69, 437940, H01L 21266

Patent

active

049578731

ABSTRACT:
Isolation trenches are formed in a semiconductor, e.g. silicon, substrate by selectively doping the substrate and preferentially oxidizing the doped material. Typically the dopant is arsenic or phosphorus and preferably the substrate is doped to a level of at least 5.times.10.sup.19 cm.sup.-3.

REFERENCES:
patent: 4717687 (1988-01-01), Verma
Wolf et al., Silicon Processing for the VLSI Era V.1, Lattice Process, Sunset Beach, Calif., U.S.A. (1986), pp. 200-207, 212-215.

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