Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1998-02-19
1999-11-02
Dang, Trung
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438435, 438437, 148DIG50, H01L 2176
Patent
active
059769483
ABSTRACT:
A method for producing a semiconductor device using an improved trench isolation technique includes, first, forming a masking layer over a device layer. A first portion of the masking layer and an underlying portion of the device layer are removed to form at least one trench. A second portion of the masking layer is then selectively removed from a region adjacent the trench and above the device layer. A dielectric layer is formed in the trench so that the dielectric layer at least partially fills the trench and the region adjacent to the trench and above the device layer. The dielectric layer includes a trench cap above the trench isolation region and the device layer. The trench cap extends laterally and longitudinally above and beyond the trench isolation region, in accordance with the second portion of the masking layer which was removed. This enlarged trench cap permits the removal of a portion of the dielectric material from the trench cap during subsequent processing without the consequent formation of substantial voids between the dielectric material in the trench and the device layer.
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Wolf, S., Silicon Processing for the VLSI Era, Vol. 2--Process Integration, .COPYRGT.1990, Lattice Press, Sunset Beach, California 90742; pp. 28-58.
U.S. application ser. No. 08/993,756, filed Dec. 18, 1997.
Dawson Robert
Werner Thomas
Advanced Micro Devices
Dang Trung
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