Process for forming an IC wafer with buried Zener diodes

Details Process for forming an IC wafer with buried Zener diodes Process for forming an IC wafer with buried Zener diodes

1983-10-05

1985-04-16

Ozaki, G.

Metal treatment

Process of modifying or maintaining internal physical...

Chemical-heat removing or burning of metal

148190, H01L 2122

Patent

active

045114137

ABSTRACT:
The new process makes it possible to produce stable buried Zener diodes in large-sized wafers where slow ramping of diffusion temperatures is required to avoid crystal damage and other adverse effects. The process includes an initial deep diffusion of p type dopant carried out in two separate steps. In the first step, a diffusion of p dopant is made and is partially driven in. Thereafter, a second diffusion of p dopant is made over the first diffusion and both diffusions are further driven in to the required degree. The Zener diode is completed by still further diffusions including an n dopant diffusion to establish a sub-surface breakdown junction with the first two p dopant diffusions. The first two p dopant diffusions use the same mask window, and preferably are made during the isolation diffusion sequence for the wafer.

REFERENCES:
patent: 4099998 (1978-07-01), Ferro et al.
patent: 4138280 (1979-02-01), Rodov
patent: 4177095 (1979-12-01), Nelson
patent: 4213806 (1980-07-01), Tsang
patent: 4393575 (1983-07-01), Dunkley et al.
patent: 4450021 (1984-05-01), Batra et al.

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