Process for forming a semiconductor device with ESD protection

Details Process for forming a semiconductor device with ESD protection Process for forming a semiconductor device with ESD protection

1995-02-06

1998-03-31

Dutton, Brian

Fishing, trapping, and vermin destroying

437 41, 437979, H01L 21265

Patent

active

057337942

ABSTRACT:
A semiconductor device with an electrostatic discharge (ESD) protection transistor is devised, wherein the ESD protection transistor has halo regions of an opposite conductivity type from the source and drain regions adjacent thereto. In one embodiment, the ESD protection transistor is a thick field oxide (TFO) transistor. In some cases, the halo regions may be provided with an ion implant step without the use of an extra mask. The halo regions permit the ESD protection transistor to have its breakdown voltage adjusted so that it turns on before the device it is protecting is affected by an ESD event. The use of halo regions avoids the increase in device area and adverse effects to the AC performance of the circuit being protected that are disadvantages of prior approaches.

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