Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board
Patent
1977-06-30
1979-08-21
Newsome, John H.
Coating processes
Electrical product produced
Integrated circuit, printed circuit, or circuit board
96 351, 96 362, 427259, 427270, B05D 306, B32B 310
Patent
active
041653955
ABSTRACT:
A high aspect ratio structure (with a large height-to-linewidth ratio) is formed on a substrate by means of two resist layers with different kinds of radiation to which they are sensitive, respectively, with an actinic radiation sensitive resist below and an electron sensitive resist above. In addition, a metallic film is shaped by means of exposure of the upper layer of resist to form a metallic mask through which the lower layer of resist is exposed. Exposure may be performed by a "subtractive" technique or an "additive" technique. In the case of the subtractive technique, the substrate is coated by a first actinic resist above which are deposited first a metallic film and then a top layer of electron resist. The top resist layer is exposed and developed and the metal layer is etched so the lower resist can be exposed and developed with the pattern formed in the metal, with the pattern shape originally exposed in the top layer of resist extending down to the substrate.
In the additive technique, the pair of resists is deposited first with the actinic resist layer below and the electron resist layer above. The electron beam exposes the electron resist which is developed to provide openings. Then, a metallic layer is deposited and the electron resist which remains is removed with some of the metal in a lift-off step. The openings provided in the metal during the lift-off step are used as apertures for exposure of the lower resist layer to actinic radiation. The lower resist is developed, yielding a high aspect ratio structure as was done in the first case.
REFERENCES:
patent: 3761264 (1973-09-01), Sterzer
patent: 3982943 (1976-09-01), Feng et al.
patent: 4018938 (1977-04-01), Feder et al.
patent: 4022927 (1977-05-01), Pfeiffer et al.
patent: 4024293 (1977-05-01), Hatzakis
Romankiw, "IBM Tech. Disc. Bull.", vol. 18, No. 12, May 1976, pp. 4219-4221.
Spiller et al., "Solid State Technology", Apr. 1976, pp. 62-67.
International Business Machines - Corporation
Jones II Graham S.
Newsome John H.
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