Process for forming a buried drain or collector region in monoli

Details Process for forming a buried drain or collector region in monoli Process for forming a buried drain or collector region in monoli

1992-10-27

1994-04-05

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 6, 437 31, 437 75, 148DIG126, 257273, H01L 2170, H01L 2700

Patent

active

053004515

ABSTRACT:
The invention relates to a process for forming a buried drain or collector region in monolithic semiconductor devices comprising an integrated control circuit and one or more power transistors with vertical current flow integrated in the same chip. The process allows optimization of the current-carrying capacity and the series drain resistance of the power stage and operating voltage by the implantation of a buried gate region in a first epitaxial layer after the formation of said epitaxial layer. These buried gate regions high dopant concentrations where the dopants have low diffusion coefficients. These low diffusive dopants permit more accurate and form defined buried gate regions than current formation techniques utilizing formation of buried gate regions implemented in the substrate where these gate regions contain highly diffusive dopants.

REFERENCES:
patent: 4503603 (1985-03-01), Blossfeld
patent: 4914051 (1990-04-01), Huie et al.
patent: 5034337 (1991-07-01), Mosher et al.

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