Process for formation of large area flat panel display using sid

Electric lamp or space discharge component or device manufacturi – Process – With assembly or disassembly

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H01J 918

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active

057116938

ABSTRACT:
A process for formation of a large area flat panel display, and particularly a process for formation of a large area flat panel display using a side junction is disclosed, in which a large area is achieved by utilizing a side junction. More specifically, there is provided a process for formation of a thin film transistor liquid crystal display which can be used on all kinds of flat panel displays which uses glass as the substrate. The process for formation of a large area flat panel display utilizing a side junction according to the present invention includes the steps of: applying a side junction process on thin film transistor unit panels 2 so as to obtain a large area; and coupling a common electrode panel with said large area thin film transistor panel formed through said side junction process.

REFERENCES:
patent: 4156833 (1979-05-01), Wey et al.
patent: 4408836 (1983-10-01), Kikuno
patent: 4820222 (1989-04-01), Holmberg et al.
patent: 5087307 (1992-02-01), Nomura et al.
patent: 5164853 (1992-11-01), Shimazaki
patent: 5347292 (1994-09-01), Go et al.

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