Fishing – trapping – and vermin destroying
Patent
1994-10-14
1995-10-10
Fourson, George
Fishing, trapping, and vermin destroying
H01L 2176
Patent
active
054570670
ABSTRACT:
A process for formation of an isolating layer for a semiconductor device is disclosed. During formation of a field isolating layer, a pad oxide layer is formed which is intended to buffer the difference of the thermal expansion rates between the silicon substrate and a nitride layer. First and second side wall spacers are formed, so that the flow of the oxidant into the buffering pad oxide layer should be inhibited, and that the damage-causing shear stress should be reduced. Thus the structural defect having the shape of the bird's beak is prevented, thereby securing a high density element region. Further, during the formation of a monocrystalline silicon, the growth thickness may be optimized, so that the resulting semiconductor device should be flattened, thereby simplifying the process.
REFERENCES:
patent: 4398992 (1983-08-01), Fang et al.
patent: 5108946 (1992-04-01), Zdebel et al.
patent: 5248350 (1993-09-01), Lee
patent: 5399520 (1995-03-01), Jang
Toru Kaga, et al.; "Advanced OSELO Isolation with Shallow Grooves for High-Speed Submicrometer ULSI's; IEEE Transactions on Electron Devices", vol. 35, No. 7, Jul. 1988; pp. 893-898.
Fourson George
Goldstar Electron Co. Ltd.
Loudermilk Alan R.
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