Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Patent
1995-06-07
1999-11-16
Graybill, David
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
438115, 438614, 438615, 438653, 438654, 438661, 438677, 438686, 438760, 438763, 22818022, H01L 21283, H01L 21603
Patent
active
059856920
ABSTRACT:
A method for flip-chip bonding an integrated circuit die to a substrate. The method includes the steps of providing the integrated circuit die with at least one gold bump, forming a barrier layer on the gold bump, forming a bronzing agent on the barrier layer, and providing the substrate with at least one conductive bonding area, which is also covered with gold. The bronzing agent on the integrated circuit die is then aligned on the conductive bonding area, and a compression force is applied to the die and substrate so as to establish contact between the bronzing agent and the conductive bonding area. While maintaining position between the gold bump and conductive bonding area, the structure is alloyed such that the bronzing agent and the gold on the conductive bonding area form an intermetallic compound, thereby forming a bond between the die and the substrate. The barrier layer functions to prevent the bronzing agent from diffusing with the gold bump.
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Matthews James A.
Poenisch Paul
Tsao Trancy
Graybill David
MicroUnit Systems Engineering, Inc.
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