Process for fetching out error statistics data

Multiplex communications – Diagnostic testing – Determination of communication parameters

Reexamination Certificate

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Details

C370S218000, C370S242000, C370S362000, C370S395430

Reexamination Certificate

active

06185192

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention relates to a method for reading out error statistics data which are produced in duplicate processing units.
Accordingly, this concerns the reading out of error statistics data which arise in duplicated processing units operated in microsynchronous parallel operation for processing ATM information. In this arrangement, the processing units are connected to a switching matrix which may be duplicated. They output in each case, for generating the microsynchronous parallel operation, a synchronization signal identifying the corresponding processing phase if the received information to be processed is free of errors and, respectively, the results of the information processing to be sent out are free of errors, to the partner unit, to which synchronization signal the beginning of the processing phase of the latter unit is synchronized. If there is no synchronization signal from the partner unit, the processing unit concerned, however, stops information processing, that is to say rejects the received information even in the case of correct reception of information just as in the case of faulty information. This correspondingly applies to the transmitter direction. In this case, blank information is output even though a faultless information processing result is given.
The processing units are connected via a bus interface to a central control unit which compares information items reaching it with one another, among other things for monitoring the microsynchronous operation of the processing units.
In the case of the constellation described, different error situations can arise in the duplicated processing units so that the error statistics are also different without this having to interfere with the microsynchronous parallel operation.
If any error statistics data were being read out like ATM information directly via the abovementioned bus interface for the purpose of evaluation and thus also subjected to a comparison, it would be highly probable that an inequality and thus erroneously the loss of microsynchronism would be signalled.
SUMMARY OF THE INVENTION
It is therefore the object of the invention to specify a method which allows a read out of the error statistics data without this effect occurring, and the performance of which does not require any additional hardware expenditure and only little additional control expenditure.
In general terms the present invention is a method for reading out error statistics data, the statistics data being produced in duplicated processing units for processing ATM information operated in microsynchronous parallel operation, the processing units being connected to a duplicated switching matrix. For generating microsynchronous parallel operation, the processing units in each case output a synchronization signal identifying the corresponding processing phase to the partner unit in the case of freedom from errors of a received ATM information item to be processed and in the case of freedom from errors of an information processing result to be output, to which synchronization signal the beginning of the processing phase of the partner unit is synchronized. In the case of a lack of a synchronization signal from the partner unit, however, the processing unit affected stops information processing even in the case of the correct reception of an ATM information item just like during the reception of a faulty ATM information item. Alternatively, it outputs a blank information item even in the case of an undisturbed information processing result. The processing units are also connected via a bus interface to a central processing unit, which among other things also evaluates the statistics data reaching it. Information coming from a switching matrix part reaches both processing units and information sent out by a processing unit is supplied to all existing switching matrix parts. For monitoring the microsynchronous operation of the processing units, the information items output by these units in each case via the bus interface are compared for a match. The error statistics data is inserted in the processing units like processing results into ATM transmit cells which are sent to the switching matrix and which are addressed to their point of origin and therefore, after corresponding switching-through, again reach the relevant processing unit as ATM receive cells and reach the central control unit via the associated bus interface like other ATM information.
Advantageous developments of the present invention are as follows.
In the case of an active/standby mode of the processing units, in which the processing unit which is in the standby state, sends blank information in the ATM information cells, the sending-out of statistics data by this processing unit is effected as follows. An internal control command bit, which initiates the sending-out of ATM cells with blank information in the case of a match or non-match, depending on specification, with an external control command bit supplied by a higher-level controller and determining the standby mode of the processing unit, selectively for the ATM cells into which the statistics data are to be inserted, is to be inverted compared with the state assumed in standby mode.
Accordingly, the solution according to the invention amounts to treating the error statistics data like the results of the information processing of ATM information items by the processing units but, at the same time, ensuring that after these have been sent out to the circuit network for transmitting ATM information, to which the processing units are connected, they are transmitted back again like ATM information items to be processed and during this process reach both processing units because of the assumed duplication operation. As a consequence of this, both processing units in each case supply matching error statistics data at the same time via the bus interface, which data in each case relate to one of the processing units so that differences in the error statistics data existing per se for the two processing units do not lead to erroneous signalling of a loss of microsynchronism. A further development of the invention error statistics data is read out even when the processing units operate in active/standby mode in which the processing unit which is in standby state sends blank information in the ATM information cells and makes it possible that statistics data of this processing unit can also be read out without requiring an active/standby change of the processing units to be effected.


REFERENCES:
patent: 42 27 118 (1993-11-01), None
patent: WO 93/03567 (1993-02-01), None
AT&T Technical Journal, vol. 72, No. 6, Nov. 1993, XP 000434018, Mark A. Pashan, Technologies for Broadband Switching, pp. 39-47.

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