Process for fair and prioritized access to limited output buffer

Multiplex communications – Wide area network – Packet switching

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Details

370 856, 370 8515, 370 941, H04J 326, H04L 1228

Patent

active

052766810

ABSTRACT:
A process for fairly allocating resources in a multiport packet switch is disclosed. Each port is connected to a station and comprises a transmit FIFO buffer and a receive FIFO buffer. The ports are connected by a broadcast transmission medium. A transmit buffer of a specific port gains access to the transmission medium when the port possesses a token which is passed from port to port in a round-robin fashion. When a port recognizes that a transmitted packet is addressed to it, the port uses a local processor to determine whether or not to accept the packet. The determination is based on (1) information in the packet header, e.g., priority and address of the transmitting port, (2) the status of the receive buffer (full or not), and (3) other locally recorded information regarding past history of the acceptance or rejection of packets from particular ports and of particular priority classes needed to achieve fairness among packets of the same class and priority among different classes. If the receiving port makes a determination to reject a packet, the receiving port issues a busy signal which is transmitted over the broadcast medium. When the transmitting port receives the busy signal, it aborts transmission of the packet and releases the token. If the receiving port decides to accept the packet, the packet is written into the receive buffer of the receiving port.

REFERENCES:
patent: 4849968 (1989-07-01), Turner
patent: 4953157 (1990-08-01), Franklin et al.
patent: 4993025 (1991-02-01), Vesel et al.
patent: 5165019 (1992-11-01), Sweazey
patent: 5165024 (1992-11-01), Sweazey

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