Process for fabricating single polysilicon high performance BICM

Details Process for fabricating single polysilicon high performance BICM Process for fabricating single polysilicon high performance BICM

1996-10-28

1997-10-28

Niebling, John

Fishing, trapping, and vermin destroying

437 59, 437191, 148DIG9, H01L 21265

Patent

active

056817657

ABSTRACT:
The present method for forming a BICMOS device includes the steps of defining first and second active regions for formation of bipolar and MOS transistors respectively. A gate oxide is provided over the second active region, and a polysilicon layer portion is provided over the gate oxide. A second, relatively thick polysilicon layer is provided over the resulting structure so as to overlie the first and second active regions, gate oxide and polysilicon layer portion. A portion of the thick polysilicon layer overlying the first active region is masked, and the unmasked portion of the thick polysilicon layer is etched to thin it. After removal of the masking, the processing steps to complete the bipolar transistor and MOS transistor are undertaken, the thinning of the unmasked portion of the thick polysilicon layer having been undertaken so that as appropriate etching in further processing takes place, gouging of the first active region during such further etching is avoided.

REFERENCES:
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patent: 5182225 (1993-01-01), Matthews
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patent: 5338696 (1994-08-01), Ilderem et al.
patent: 5354699 (1994-10-01), Ikeda et al.
patent: 5512497 (1996-04-01), Ikeda et al.

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