Process for fabricating self-aligned metal gate field effect tra

Fishing – trapping – and vermin destroying

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437 29, 437 34, 437 40, 437 44, 437 56, 437247, 437950, 437986, 148DIG3, 148DIG4, H01L 2170

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051697963

ABSTRACT:
A method of fabricating a metal-gate field effect transistor having source and drain regions which are self-aligned with the gate. The source and drain dopants are introduced into the substrate and driven. Then, a metal gate is formed, the metal gate having a length which is approximately the same as the length of the channel. After the gate is fabricated, dopant ions are implanted into any portions of the channel not covered by the gate. These dopant ions are activated by rapid thermal annealing at a temperature selected to avoid damage to the metal gate, to form bridge regions which extend one or both of the source/drain regions into the channel and which are self-aligned with the gate.

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Wolf "Silicon Processing for the ULSI Era" pp. 57-58, 307-308, 325-326, 1986.

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