Process for fabricating nonvolatile random access memory having

Details Process for fabricating nonvolatile random access memory having Process for fabricating nonvolatile random access memory having

1994-04-25

1995-05-02

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 47, 437985, H01L 21266

Patent

active

054119049

ABSTRACT:
A nonvolatile random access memory comprising a nonvolatile random access memory unit having on a substrate an EEPROM having a tunnel oxide film and a floating gate, and a DRAM linked to the EEPROM, a thermal oxide film being selectively formed between the EEPROM and another EEPROM adjacent thereto, the tunnel regions of the respective EEPROMs being provided as self-aligned with the respective ends of the thermal oxide film and positioned at the respective ends of an impurity ion implantation pattern for use in forming a source region of the EEPROMs.

REFERENCES:
patent: 4642881 (1987-02-01), Matsukawa et al.
patent: 4727043 (1988-02-01), Matsumoto et al.
patent: 4945068 (1990-07-01), Sugaya
patent: 5019879 (1991-05-01), Chiu
patent: 5181188 (1993-01-01), Yamauchi et al.
IEDM 1989 Dec. "A Versatile Stacked Storage . . . NVRAM Applications", Yamauchi et al, pp. 25.5.1-25.5.4.
IEDM 1990 Dec. "A 4M Bit NVRAM Technology . . . Cell Structure", Yamauchi et al, pp. 5.9.1-5.9.3.

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