Process for fabricating integrated circuit devices

Details Process for fabricating integrated circuit devices Process for fabricating integrated circuit devices

1995-03-07

1995-11-28

Picardat, Kevin M.

Fishing, trapping, and vermin destroying

437189, 437192, 437195, 437203, H01L 2144

Patent

active

054707897

ABSTRACT:
A process for fabricating an integrated circuit device comprises a first step of forming an opening in an insulating layer formed on a substrate, a second step of depositing a copper layer on the substrate including the opening, a third step of abrading the copper layer to remove the copper layer deposited on the insulating layer, while part of the copper layer deposited in the opening is removed until the upper surface of said part becomes lower than the upper surface of the insulating layer, a fourth step of depositing a barrier layer on the substrate including the copper layer in the opening, and a fifth step of abrading the barrier layer to remove part of the barrier layer on the insulating layer while part of the barrier layer on the copper layer in the opening is left, so as to planarize the surface. A wiring layer of copper can be formed without a conventional step of etching a copper layer to leave a wiring layer. Furthermore, the copper wiring layer is coated by layers of barrier materials, whereby oxidation and diffusion of the copper is precluded with a result that planarized wiring layers of high electromigration resistances and low resistances can be formed.

REFERENCES:
patent: 5008216 (1991-04-01), Huang et al.
patent: 5071789 (1991-12-01), Nakata
patent: 5084413 (1992-01-01), Fujita et al.
patent: 5130274 (1992-07-01), Harper et al.
patent: 5164330 (1992-11-01), Davis et al.
patent: 5219789 (1993-06-01), Adan
patent: 5254498 (1993-10-01), Sumi
patent: 5262354 (1993-11-01), Cote et al.

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