Process for fabricating field effect transistor

Details Process for fabricating field effect transistor Process for fabricating field effect transistor

1992-09-10

1993-12-14

Thomas, Tom

Fishing, trapping, and vermin destroying

437 40, 437 44, 437162, H01L 2170

Patent

active

052702324

ABSTRACT:
A very thin oxide film is formed at an opening formed in an insulator film and a conductor layer, on a substrate, and impurity-containing polysilicon is formed on the sidewall of the opening. Impurity diffusion from the from the silicon into the substrate through the very thin oxide film causes a lowering in effective concentration of the diffused impurities, resulting in the formation of shallower source/drain region. Thereafter, a gate insulator film and a gate electrode are formed on the substrate surface in an area bounded by an insulator film formed on the sidewall of the opening. The gate electrode smaller than the opening, the size of which corresponds to the limit of processing, and the shallower source/drain region afford a miniaturized MOSFET.

REFERENCES:
patent: 4419810 (1983-12-01), Riseman
patent: 4845046 (1989-07-01), Shimbo
patent: 4939154 (1990-07-01), Shimbo
patent: 4978629 (1990-12-01), Komori et al.
patent: 5008209 (1991-04-01), Appels et al.
patent: 5175118 (1992-12-01), Yoneda

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