Process for fabricating double well regions in semiconductor dev

Details Process for fabricating double well regions in semiconductor dev Process for fabricating double well regions in semiconductor dev

1995-04-14

1997-04-29

Chaudhari, Chandra

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Isolation by pn junction only

438451, 438228, H01L 218238, H01L 21761

Patent

active

056248571

ABSTRACT:
A process for fabricating double well regions for a semiconductor device having a first well region of a first type and a second well region of a second type on the substrate is disclosed. The process comprises the steps of first implanting impurities of the first type into the substrate. Then a shielding layer covering the location designated for the first well region of the first type on the substrate is formed. Impurities of the second type are then implanted into the substrate at locations not covered by the shielding layer and designated for the formation of the second well region of the second type. Finally, the impurities of both the first and the second type are driven into a designated depth of the substrate by a heating process to form the first well region of the first type and the second well region of the second type.

REFERENCES:
patent: 4929565 (1990-05-01), Parrillo
patent: 5300797 (1994-04-01), Bryant et al.
patent: 5413944 (1995-05-01), Lee

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