Process for fabricating dielectrically isolated semiconductor co

Metal treatment – Stock – Ferrous

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357 45, 148175, H01L 2712

Patent

active

039381765

ABSTRACT:
Disclosed is a method of fabricating dielectrically isolated semiconductor components of an integrated circuit, and the semiconductor component formed by this method, each component having a plurality of high conductivity regions extending from the interior of said component to the surface thereof to provide high conductivity paths to selected semiconductor regions of the component.

REFERENCES:
patent: 3509433 (1970-04-01), Schroeder
patent: 3666548 (1972-05-01), Brack et al.
patent: 3738877 (1973-06-01), Davidsohn
patent: 3748546 (1973-07-01), Allison

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